In an open letter to the SATA-IO Administration, industry consultant Paul A. Mitchell has devised a technology that could improve the performance of modern SSDs to match the capabilites of DDR2 system memory. Included below is the original text:
Greetings SATA-IO Administration,
My office has been contemplating a Provisional Patent Application to add a significant performance feature to the standard SATA/6G protocol.
By dispensing with the one start bit and one stop bit for every 8-bit byte transmitted, I believe that the future performance of SATA devices can be enhanced significantly, particularly as we all migrate to much faster Nand flash solid-state drives ("SSD").
Building on Western Digital's "advanced format", it is clear that a 4 Kilobyte (4,096-byte) block can maintain data integrity with much fewer error correction bits ("ECC").
My office has invented a storage device that will inter-operate much faster if the 10/8 overhead can be eliminated, effectively increasing SATA bandwidth to ~750 Megabytes per second for each SATA/6G channel (6 Gigabits per sec. / ~8 bits per byte).
In quad-channel mode ("QC"), such a speed increase should afford a raw bandwidth of 3 GB/second (~750 x 4 = 3,000 MB/sec.) which rate approaches the effective speed of DDR2 SDRAM in single-channel mode.
It occurs to me that such a change to the industry standard SATA protocol ought to be in the public domain, rather than a proprietary invention protected by a U.S. patent. What do you think?
If you are interested in exploring this idea further, please reply with directions for submitting a more formal proposal for your consideration.
Thank you.
Sincerely yours,
/s/ Paul A. Mitchell, B.A., M.S., Instructor,
Inventor and Systems Development Consultant
